Execution Modes

Hybrid execution.
Speed and proof.

Iterate fast on an architectural runtime, then validate the same workload against real SystemVerilog RTL — without leaving the platform.

Fast Simulation

Architectural runtime

  • Architectural runtime
  • Interactive evaluation
  • Fast iteration
  • Full telemetry & evidence
    • Best for real-time customer interaction and design-space exploration. Values are an architectural model estimate.
    RTL Validation

    SystemVerilog validation

  • SystemVerilog validation via iverilog
  • Pass/fail + checks evidence
  • Execution verification
  • RTL evidence + comparison report
    • Best for functional sign-off. Compiles and runs the real RTL; reports what actually passed.
    RTL Validation evidence and execution comparison in XMCP Studio
    Live capture: RTL Validation runs the real testbenches and shows an evidence report plus a Fast vs RTL comparison. Representative workload; values produced at runtime.
    See both modes in XMCP Studio → How XMCP works

    Honest framing: Fast Simulation gives the full telemetry as a model estimate; RTL Validation gives functional verification of the implemented modules.